SPI & I2C: hardware interfaces

They agree on a transmission speed (Baud rate – e.g., 9600 bps) in advance. The transmitter sends a special signal meaning “attention, I’m starting” (the start bit).

When the receiver reads it, it starts its precise internal timer and begins sampling the line at equal time intervals. At the end, a stop bit is appended (“I’m done”).

On a shared bus (like RS-485), everyone hears everyone. It’s like a walkie-talkie on a single channel.

When a transmitter sends a data packet:

All devices on the bus catch the start bit and begin receiving the first byte (or several bytes). Usually, the address byte is placed at the beginning of the packet.

The microcontroller of each receiver reads this byte at the hardware level and passes it to its processor. If the address doesn’t match, a command is issued to ignore everything that follows until the packet ends (indicated by a pause or a stop character).

An engineering trick (9-bit UART mode):

To prevent the processors of the devices on the bus from wasting resources every time someone transmits data, hardware filtering was invented.

Instead of 8 bits, 9 bits are transmitted. The ninth bit acts as a flag:

• 1 – means an address is currently flying over the bus;
• 0 – means data is being sent.

The hardware (UART) inside the microcontroller is configured in such a way that it doesn’t disturb the processor at all until it sees a byte with a flag of 1 (an address). As soon as an address arrives, the UART wakes up the processor: “An address has arrived, check if it’s ours?”.

If it’s not ours, the processor tells the hardware to stand down, and the hardware automatically ignores all subsequent data bytes (where the flag is 0), completely offloading the main processor.

Approach A: Master-Slave

This is the classic method for RS-485 (e.g., Modbus). Only one Master is configured on the bus. All other 10, 20, or 100 devices are Slaves.

The single rule is: a Slave never initiates communication on its own. It stays silent and listens:

1. The Master sends a request to device #3 over the bus and switches to receive mode;
2. Devices #1, #2, #4, etc., remain silent;
3. Device #3 recognizes that it is being addressed and responds;
4. The Master receives the response and sends a request to the next device.

Physical collisions are impossible here because the queue is strictly controlled by the Master (this process is called polling).

Approach B: Multi-Master

This is the CAN bus (used in cars). There is no single Master. Any sensor can start transmitting at any moment.

What happens if two sensors start transmitting simultaneously?

The CAN bus features a brilliant hardware trick. While transmitting bits, devices “listen” to the bus itself. If a device tries to transmit a logical 1, but sees a logical 0 on the bus (because someone else is simultaneously transmitting a 0, and in CAN, a zero “overpowers” a one), it realizes that someone is transmitting a higher-priority message, and it instantly stops mid-transmission.

The secret is that a CAN data packet always starts with a Message Identifier (ID). For every type of message in a car or machine, this ID is unique.

It may happen that devices transmit identical data for a while, but sooner or later one will want to send a 0, and the other a 1. Ultimately, the device attempting to send a 1 will see a 0 on the bus, realize it lost the arbitration, and instantly go silent.

Thanks to this mechanism, the message Identifier (ID) also dictates its priority. The more zeros at the beginning of the ID, the higher the priority of the message (because zeros will quickly “override” someone else’s ones in case of a transmission time overlap).

Advantages of inter-board asynchronous communication:

• Noise immunity: Differential signals (as in RS-485 or CAN) are frequently used for inter-board communication. Information is transmitted over two wires in antiphase. If lightning strikes nearby or a powerful motor turns on, the interference hits both wires equally, and the receiver simply subtracts (ignores) it.
• Reduced wiring: Fewer cores in a cable mean cheaper and more reliable connections.

Disadvantages:

• Overhead: To transmit 1 byte (8 bits) of useful data, you must add a start bit, a stop bit, and sometimes a parity bit. Essentially, we transmit 10-11 bits just to deliver 8.
• Precision requirements: Both devices must have highly accurate crystal oscillators. If the clocks of the transmitter and receiver drift even by 3-5%, the receiver will sample the line at the wrong moment, and the byte will be corrupted.

Advantages of intra-board synchronous communication:

1. High speed: No time is wasted on synchronization; the receiver simply reads data to the beat of the transmitter’s clock signal.
2. Hardware simplicity: The receiver doesn’t need to calculate the transmission time and speed; it merely waits for a signal change on the Clock line.

Disadvantages:

1. Interference: If a synchronous bus is run over a cable longer than 20-30 cm, the signals begin to degrade, distort, and pick up noise due to the cable’s capacitance and inductance.
2. Clock Skew: The Clock signal might arrive at the receiver slightly earlier or later than the data signal. As a result, the receiver will read garbage data.

The advantages of this approach are:

1. The processor is free: While the byte is flying over the wires, the core can compute complex algorithms, poll other sensors, or simply go into sleep mode to save battery life.
2. Precision: The hardware block is clocked directly from the crystal oscillator, so its timings will never drift. You can push data at megabit speeds (SPI can easily run at 50 Mbps).
3. DMA (Direct Memory Access) support: The hardware block can autonomously fetch data arrays from memory and send them without any processor intervention.

Disadvantages:

1. Limited quantity: A cheap chip might have only 1 UART and 1 SPI block.
2. Strict pin binding: A hardware UART is usually routed to strictly defined pins on the chip.

Advantages of software emulation:

1. Complete freedom: Any microcontroller pin can become a UART, SPI, or whatever you need.
2. Infinite quantity: You can create 10 software UARTs on a single chip if you want.
3. Custom protocols: If you have a sensor with its own proprietary protocol that lacks a dedicated hardware block, bit-banging is your only solution.

Disadvantages:

1. Processor is paralyzed: While the processor software-generates the bits and loops in a delay cycle, the microcontroller cannot do anything else.
2. Interrupt issues: If a system timer interrupt or a button press occurs, the processor abandons the bit-bang, goes to handle the button (which takes, say, 5 microseconds), and returns. As a result, the bit lasted 13 microseconds instead of 8. The timing is ruined, and the packet is lost.
3. Low speed: Software emulation cannot handle megabit speeds.

Unlike UART or CAN, SPI lacks software addresses. The hardware is simple and fast.

So how does the Master know who it’s talking to? Through the CS (Chip Select) wires.

The SCK, MOSI, and MISO lines are shared by everyone. They are connected in parallel. But the CS line must be individually routed for each device.

Want to poll the temperature sensor? The Master pulls CS1 down to zero. The temperature sensor connects its MISO to the bus. Once the exchange is over, the Master pulls CS1 back to one. The temperature sensor disconnects (putting its MISO pin into a Z-state – high impedance, as if the wire were cut).

Want to write to an SD card? The Master pulls CS2 down. And so on.

In SPI, there is no strict standard defining exactly how a clock cycle should look. Sensor manufacturers are free to design it however they want. Therefore, the Master must be able to adapt.

CPOL (Clock Polarity): What does the Clock line do when the bus is idle? It can idle low (CPOL=0) or idle high (CPOL=1).

CPHA (Clock Phase): At what exact moment should data be read? On the first Clock edge (leading) or the second (trailing)? (CPHA=0 or 1).

By combining them, we get 4 SPI modes (Mode 0, 1, 2, 3).

If the microcontroller is set to Mode 0, but the display expects Mode 3, they will read data shifted by half a clock cycle, resulting in garbage on the screen.

You need to open the chip’s datasheet, check the “SPI Mode Timing Diagram”, and configure the controller accordingly. In 90% of cases, it’s Mode 0.

SPI does not feature a built-in standard mechanism to differentiate Read commands from Write commands (as is done in I²C). The hardware simply drives bits in a circle – rotating the shift register.

Therefore, major manufacturers invented their own standard on top of SPI so as not to reinvent the wheel every time:

In the datasheet of any complex sensor (e.g., a gyroscope), there is a table – the Register Map.

From an SPI perspective, a sensor is a collection of registers. Each register has its own address from 0x00 to 0x7F.

• Register 0x0F (WHO_AM_I) holds the factory chip ID.
• Registers 0x28 and 0x29 hold the acceleration data.
• You need to write settings to register 0x20 (CTRL_REG) to turn the sensor on.

How does the sensor understand whether we want to read register 0x20 or write new settings to it?

Here is where the most significant bit (the 7th bit) of the address byte comes into play.

A sensor rarely has more than 128 addresses (from 0x00 to 0x7F). This means the most significant (eighth) bit in the address byte is always available (equal to zero). It was decided to use it as a Read/Write flag.

In 90% of chips, the logic goes like this:

• MSB = 1 – READ command.
• MSB = 0 – WRITE command.

In hexadecimal, the MSB equals 0x80 (in binary, this is 1000 0000).

Need to WRITE to register 0x20?

• Send the address as is: 0x20. The MSB there is zero. The sensor understands this is a write operation.

Need to READ from register 0x20?

• Set the MSB to one. Take the register address and apply a bitwise OR with 0x80 (0x20 | 0x80 = 0xA0).
• Send the byte 0xA0. The sensor sees a 1 in the 7th bit position, strips it away, understands you are referring to register 0x20, and starts outputting its contents over the MISO line.

Summary: Apply the 0x80 mask to the address for reading. Send a “clean” address for writing.

Advantages of SPI:

• Massive speed: Operates at frequencies in the tens of megahertz (up to 50-100 MHz). Ideal for transferring heavy data, like rendering graphics on TFT displays or working with flash memory and SD cards.
• Full-duplex: Thanks to two separate MOSI and MISO wires, the Master and peripheral can send and receive data absolutely simultaneously.
• Minimal overhead: The protocol itself lacks start bits, address bits, or acknowledgments. You simply pull CS down to zero and immediately push 100% useful data.
• No pull-up resistors: Microcontroller outputs operate in push-pull mode (they actively drive both 0 and 1), meaning signal edges are sharp, and no external strapping components are required on the board.

Disadvantages:

• Pin consumption (scaling issue): There are three shared wires, but each new device on the bus requires its own dedicated CS (Chip Select) line. For 10 sensors, you’ll occupy 13 microcontroller pins, and board routing becomes complex.
• Operating blind (no ACK): The bus doesn’t hardware-verify whether the data arrived. If the sensor burned out, froze, or isn’t even soldered, the Master won’t notice and will simply read garbage from the line.
• Strictly one Master: The SPI architecture does not support multiple masters on a bus (unlike I²C or CAN).
• Short wire limit: Because of high frequencies, SPI absolutely cannot tolerate long wires. Past 10-20 centimeters on a PCB, the signal will start distorting and radiating interference.

In future articles, we will explore wiring diagrams in greater detail, but for now, let’s look at the pull-up setup image below:

Source: https://www.youtube.com/watch?v=Z1_Ag3dxH34

In an idle state, the data line holds a 1 (i.e., Vcc voltage). A switch placed between Data and GND acts as the “sender” of data.

When a bit needs to be transmitted, the switch closes, connecting the line to ground, and Vcc sinks to GND through the pull-up resistor. The data line is now at 0.

Advantages of I²C:

• Pin savings: Using just 2 microcontroller pins, you can hook up up to 100 temperature sensors, screens, memories, and real-time clocks.
• Built-in delivery verification: Thanks to the ACK bit, your code always knows exactly if the byte reached the recipient or if the device froze/disconnected. SPI cannot do this.
• Multi-master: Multiple masters can reside on an I²C bus. If they start speaking simultaneously, arbitration kicks in (much like the CAN bus we discussed). The one that sends a 0 while the other sends a 1 will take over the bus.

Disadvantages:

• Speed: Drastically slower than SPI. The standard speed is 100 kbps or 400 kbps (fast mode). Transmitting an image to a display takes a long time.
• Half-duplex: Unlike SPI, you cannot read and write simultaneously over the single SDA wire.
• Overhead: To read 1 byte from a sensor, you must send a lot of preamble data: start, sensor address, register address inside the sensor, restart, address again, and only then can you read the data.
• Resistor dependency: If you forget to solder the pull-up resistors on the board, I²C simply will not work.

In SPI, there is one master, and it single-handedly controls the clock and the CS line. It alone decides who speaks and when. Bus conflicts are physically impossible – therefore, push-pull is ideal here: you can drive the signal as fast as possible, with nothing in the way.

In I²C, all devices sit on the exact same two wires, and any of them can initiate communication. If two devices output different logic levels simultaneously in push-pull mode – it creates a short circuit, and everything burns. Open-drain is the solution to this problem: no one actively drives the line high. The one pulling it low wins, and nothing goes up in smoke.